(a) Field of the Invention
The present invention relates to a semiconductor device, more in particular to the semiconductor device which is protected from deterioration or damage of a gate dielectric film due to charging of a MOS transistor in a plasma process.
(b) Description of the Related Art
A plasma process is employed in manufacture of the most semiconductors. However, the plasma process induces problems of reducing a non-defective rate of LSIs and of lowering a reliability of the LSIs because the plasma process produces damage to a gate dielectric film of a MOS device.
In FIG. 1 which illustrates an N-channel MOS transistor, a gate electrode 16 is formed on a gate dielectric film in a semiconductor substrate region surrounded by a field oxide film overlaying a P-type substrate. N-type diffused regions 15A and 15B are formed adjacent to the gate electrode 16. A metal layer 20 is formed for the gate electrode 16 and the N-type diffused regions 15A and 15B. Specifically, a metal line 20A is connected to the gate electrode 16 through gate electrode pad 19, and metal lines 20B and 20C are connected to the N-type diffused regions 15A and 15B, respectively. When plasma-etching is conducted to the metal layer 20 by employing a photoresist as a mask, charges are provided from the plasma to the gate electrode 16 through the side surface of the metal line 20, and the gate dielectric film is deteriorated.
The term xe2x80x9cantenna ratioxe2x80x9d is generally employed as an index for discussing the damage produced by the plasma. The area of the gate dielectric film of the MOS transistor, or the area of the gate electrode 16 overlapped with the diffused regions 15A and 15B is defined as Ag, and the peripheral length of the metal line 20A connected to the gate electrode 16 is defined as Am. The charges provided from the plasma to the portion Am are concentrated to the portion Ag. Accordingly, the ratio Am/Ag indicates a density of the charge provided to the gate dielectric film, and the damage becomes larger with the increase of this antenna ratio.
The peripheral length of the metal line 20A is employed as a numerator of the above antenna ratio. When considering, for example, the damage by the plasma during formation of an interlayer dielectric film on the metal line by means of a plasma CVD method, a sum of the surface area and of the side area of the metal line may be employed because the upper surface and the side surface of the metal line are exposed.
When the metal line is employed as a pad for bonding, the antenna ratio becomes relatively large because the area of the pad having a side length of 50 to 100 micronmeters is relatively large. When the metal line is employed in an integrated circuit, the antenna ratio becomes large, and the plasma produces a serious damage because the length of the metal line may become several millimeters.
In order to avert the charging of the gate electrode already mentioned, a structure shown in FIGS. 2A and 2B is proposed.
FIG. 2A is a top plan view of an improved structure of a MOS transistor and FIG. 2B is a side view of the MOS transistor of FIG. 2A.
The metal line 20A adjacent to a gate electrode 16 is connected to a protective electrode 17 through a connection line 20D. The gate electrode 16, the P-type substrate 11 underneath, and the gate dielectric film inbetween form a MOS capacitor. The area of the MOS capacitor is the same as that of a diffused region 13, which is defined as Ac. During the etching of the metal line 20A, the metal line 20A is connected to both of the gate electrode 16 and the protective electrode 17. Therefore, the antenna ratio is Am/(Ag+Ac). Since this value is smaller than the antenna ratio Am/Ag of FIG. 1, the amount of the charge provided to the gate dielectric film can be reduced. It is especially effective that Ac is made to be sufficiently larger than Ag. The area of the connection line 20D is out of consideration because it is usually small.
However, the following problems are included in the above prior art.
When the polarity of the charging by the plasma is negative, electrons flow from the gate electrode to the substrate through the gate dielectric film. Accordingly, the reduction of the damage by the plasma can be expected even by the prior art.
When, on the other hand, the polarity of the charging by the plasma is positive, electrons flow from the substrate to the gate electrode. Since the surface of the P-type substrate 11 under the MOS capacitance is depleted and the electron density is low, only little current flows through the gate dielectric film. Since the MOS capacitor does not function as a protective element, most of the charges are concentrated to the gate dielectric film of the MOS transistor, and thus the gate dielectric film is damaged.
It is therefore an object of the present invention, in view of the above, to provide a semiconductor device which is protected from deterioration or damage of a gate dielectric film due to charging of a MOS transistor, for example, under a process employing plasma.
The present invention provides, in a first aspect thereof, a semiconductor device comprising: a MOS transistor having a gate dielectric film, a gate electrode formed on said gate dielectric film, and source/drain regions formed in a semiconductor substrate of a first conductivity-type; a protective element having a protective electrode overlaying said semiconductor substrate with an intervention of a dielectric film, and at least one diffused region adjacent to said protective electrode in said semiconductor substrate; said protective electrode being connected to said gate electrode of said MOS transistor.
In a second aspect of the present invention, two diffused regions of opposite polarities are employed in place of the diffused region of the first aspect, and one of the two diffused regions is adjacent to the electrode and the other diffused region is adjacent to the above diffused region.
In a third aspect of the present invention, the two diffused regions of opposite polarities of the second aspect are connected by a connection wire.
In a fourth aspect of the present invention, both of the two diffused regions are adjacent to the electrode.
In accordance with the present invention, the amount of the current or charge flown though the gate dielectric film is reduced, and thus the damage to the gate dielectric film is reduced.
Moreover, the present invention is effective in either case when the polarity of the charging by the plasma is positive or negative.
The above and other objects, features and advantages of the present invention will be more apparent from the following description.